LogicGates.org Open the simulatorSimulator

Logic circuit generator

Type a boolean expression and get the circuit drawn with proper gate symbols, ready to download as an SVG or a PNG. Pick ANSI or IEC shapes, colour or black and white, and flip the inputs to watch the signals move. A circuit with several outputs is one line with a semicolon between the expressions.

& | ! ^ or words for AND, OR, NOT and XOR. For more than one output, separate the expressions with ; and name them: sum = a ^ b; carry = a & b.

Reading it as a ∧ b ∨ ¬a ∧ c · 4 gates · 3 levels deep

a ∧ b ∨ ¬a ∧ c a b c 0 a ∧ b ∨ ¬a ∧ c
Inputs output 0
Symbols
Colours

Click an input to flip it. Green is 1, red is 0, the same as the simulator. The download matches what you see, and black and white is the one to paste into a report.

Export as Verilog or VHDL
// Generated by logicgates.org
module a_and_b_or_not_a_and_c (
    input  wire a,
    input  wire b,
    input  wire c,
    output wire y
);

    assign y = (a & b) | (~a & c);

endmodule

One combinational assignment per output, over the same expressions the diagram draws. Every operator is bracketed because VHDL defines no precedence between and and or.

From algebra to gates

The translation is mechanical, which is why a tool can do it. Each operator becomes a gate, and an operation you wrote twice becomes one gate wired to both places.

In the expression In the circuit
a ∧ b an AND gate with a and b on its inputs
a ∨ b an OR gate
¬a a NOT gate, drawn as a triangle with a bubble
a ⊻ b an XOR gate
Brackets depth: the innermost bracket is the leftmost gate
A repeated subexpression one gate, with its output wired to both places
sum = …; carry = … two outputs on the right of one circuit, sharing the inputs and any common gates

The gates are laid out in columns by how far they sit from the inputs, so the diagram reads left to right and every wire travels forwards, routed around the gates rather than across them. Symbols are drawn as either ANSI distinctive shapes or IEC rectangles, whichever you choose above.

Getting the diagram out

The picture is only useful if you can take it away, so both formats produce a standalone file with the symbols drawn as real vector shapes rather than a screenshot of a web page.

Option What it changes Reach for it when
SVG Vector, sharp at any size, editable You will scale it, or tidy it up in a drawing program
PNG Raster, drawn at twice the size for sharpness Pasting into a document, a slide or a forum post
ANSI or IEC Distinctive shapes, or rectangles with a label inside Matching whatever your course or workplace uses
Black and white Black on white, no signal colours Printing, or a report that will be read in greyscale
Label the output The output box reads Q instead of a live 0 or 1 Drawing a general circuit rather than one worked example

Need the gate symbols on their own rather than a whole circuit? The symbol reference has all seven in both standards, and each gate page has a downloadable card with its truth table.

Fewer gates

This page draws what you typed. If the drawing looks bigger than it should be, the expression is probably not minimal yet.

  1. Simplify it first with the boolean algebra calculator or a Karnaugh map, then paste the result back here and compare the gate counts. Both links carry what you have typed, so there is nothing to retype.
  2. If you need one gate type throughout, the NAND and NOR converter will rewrite it, though the gate count usually goes up.
  3. When the shape looks right, build it for real: press ctrl+E in the simulator and paste the same expression.

Open the simulator

Questions

Can I get the expression as Verilog or VHDL?

Yes. Open "export as Verilog or VHDL" under the diagram and you get a complete module or entity: one port per variable, one port per output, and a combinational assignment for each. Copy it or download a .v or .vhd file. Every operator is bracketed, because VHDL defines no precedence between and and or, so an unbracketed expression would not compile there.

Can a circuit have more than one output?

Yes. Separate the expressions with semicolons and name each one, as in "sum = a ^ b; carry = a & b". Every output gets its own box on the right, the inputs are shared, and a term that two outputs have in common is drawn once and wired to both, which is how a full adder ends up with a single XOR feeding both its sum and its carry. The truth table generator takes the same syntax and gives one column per output.

Can I download the diagram?

Yes, as an SVG or a PNG, and the file is exactly what you see on screen. SVG stays sharp at any size and can be edited in Inkscape or Illustrator; PNG is the one to paste straight into a document. Both are free to use, including in coursework, a thesis or a slide deck.

Can I choose the gate symbols?

Yes. ANSI distinctive shapes, the ones with a D for AND and a shield for OR, or IEC rectangles with the operator written inside. The choice applies to the diagram and to whatever you download.

Is there a black and white version for printing?

Yes. Switch the colours to black and white and the diagram is drawn as black lines on white, with no signal colours to disappear in a photocopy or a greyscale print. Turning on the output label so the box reads Q rather than 0 or 1 gives you the version that belongs in a report.

How do I turn a boolean expression into a logic circuit?

Work outwards from the variables. Each operator becomes one gate: an AND for a conjunction, an OR for a disjunction, a NOT for a negation. The output of each gate feeds the operator that contained it, so the innermost brackets end up on the left and the outermost operator is the last gate before the output.

Why is a repeated term drawn as one gate?

Because that is what you would build. If the same subexpression appears twice, its gate is wired to both places rather than duplicated, which is why the gate count here can be lower than the number of operators you typed.

Are these the fewest gates possible?

No. The diagram shows your expression as written, with shared terms merged. To reduce the gate count, simplify the expression first with the boolean algebra calculator or a Karnaugh map, then paste the result back in here.

What do the wire colours mean?

Green is a 1 and red is a 0, matching the simulator. Click any input on the left to flip it and the colours propagate through the circuit immediately, so you can follow a signal from an input to the output.