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AND gate

High only when every input is high.

Truth table

ab Q
0 0 0
0 1 0
1 0 0
1 1 1

At a glance

Boolean expression
a ∧ b
Engineering notation
a · b
Inputs
Two or more
Output is high when
every input is high

How the AND gate behaves

An AND gate outputs 1 when all of its inputs are 1, and 0 the moment any one of them drops to 0. With two inputs that is a single 1 in the truth table, out of four rows.

Think of two switches wired in series along the same wire. The current only reaches the end if both switches are closed; opening either one breaks the circuit. That is exactly an AND gate, which is why AND is sometimes called a series connection.

Building it from other gates

Each of these is equivalent to the AND gate. Paste any of them into the simulator with ctrl+E to see the circuit.

Construction Expression Equals
From NAND gates !(!(a & b) & !(a & b)) a & b
From NOR gates !(!(a | a) | !(b | b)) a & b
De Morgan form !(!a | !b) a & b

Reference card

The symbol in both standards and the truth table on one image, for notes or a slide.

AND gate reference: ANSI and IEC symbols, the boolean expression a ∧ b, and the full truth table Click to download the AND reference card

Where the AND gate is used

  • Gating a signal: feed data into one input and an enable line into the other, and the data only passes while enable is high.
  • Masking bits, which is what a bitwise AND does in software, one AND gate per bit.
  • Detecting that several conditions hold at once, such as "counter is at maximum" fed from every bit of the counter.
  • The carry output of a half adder is a single AND gate.

In the simulator

The Logic menu has AND, and its input count is a parameter: open the node and ask for three or eight inputs instead of two rather than chaining several gates.

Open the simulator

Questions about the AND gate

Can an AND gate have more than two inputs?

Yes. An AND gate of any width outputs 1 only when every input is 1. In the simulator the input count is an option on the node, and in hardware three and four input AND gates are standard parts.

What is the difference between AND and NAND?

NAND is AND with the output inverted. Where AND gives 1 only when all inputs are 1, NAND gives 0 only in that case and 1 everywhere else.

The other gates